TSMC has announced an upgrade to its 5nm chip manufacturing process called N4P, the third major update to the company’s manufacturing process for this node. The company said that the new N4P process will offer 11% improvement in power efficiency over the company’s N5 technology that was being used so far. It is also promising 6% improvement in transistor density, which is a measure of the number of transistors on a chip. To be clear, N4P doesn’t mean TSMC is manufacturing 4nm chips just yet, but the company has been researching advanced lithography with 3nm and 2nm nodes as well.
“The N4P process was designed for easy migration of 5nm platform-based products, which enables customers to not only better maximize their investment but will also deliver faster and more power efficient refreshes to their N5 products,” the company said in a press release.
“N4P was optimized to provide a further enhanced advanced technology platform for both HPC (High Performance Computing) and mobile applications,” said Kevin Zhang, Senior Vice President of Business Development at TSMC. “Between all the variants of N5, N4 and N3 technologies, our customers will have the ultimate flexibility and unmatched choice of the best mix of attributes for their products,” he added,
Further, the company said that the new N4P process reduces complexity and improves wafer cycle time, which is meant to make manufacturing processes cheaper and could increase wafer production. That’s an important addition right now, given the global chip shortage that has been plaguing the industry.
TSMC, like Samsung and everyone else, has been struggling to meet the growing demand for chips since last year. While the reason for that shortage is that chips are needed for virtually every product today, companies like TSMC are at the bottom end of that supply chain.
Given that TSMC accounts for a huge part of the world’s chip production, Increasing wafer production could increase overall chip production in the long term.
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